Showing results 21 to 40 of 82
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| Issue Date | Title | Author(s) | Type | Access Type |
| 12-Jan-2023 | Design and characterization of power amplifiers for emerging technologies | Chaudhary, Sanket Virsangbhai | doctoralThesis |  |
| 2015 | Design of a power amplifier for IEEE 802.11p applications | Silva, João Nuno Oliveira Ramos da | masterThesis |  |
| 19-Dec-2022 | Design of a Reed Solomon encoder and decoder | Cardoso, Gonçalo Nuno Veleirinho | masterThesis | |
| 13-Dec-2023 | Design of an automatic gain control module for 5G receivers | Oliveira, João Pinho | masterThesis | |
| 2012 | Design platform for software defined radio systems | Matos, Luís Carlos de Oliveira | masterThesis | |
| 26-Jul-2013 | Detetor digital síncrono de sinal CW baseado em FPGA | Silvestre, Flávio Carlos da Silva Rodrigues | masterThesis | |
| 29-Jan-2021 | Development in VHDL of a 4G physical layer transmitter | Barbosa, Bruno de Pinho | masterThesis | |
| 2012 | Digital beam-steerng in a parametric array | Cordeiro, Rui Fiel | masterThesis | |
| 15-Jul-2022 | Digital signal processor for an intelligent antenna for satellite communications | Rodrigues, Ivo André Moreira | masterThesis | |
| 26-Jul-2022 | Dynamic buffer for data transfer protocol | Carvalho, Gabriel Filipe Mendes | masterThesis | |
| 2009 | Dynamic topology management unit for a fieldbus | Sher, Michael Philip Sousa | masterThesis | |
| 2011 | Emissor baseado em SDR para comunicações DSRC | Martins, Diogo José Simões | masterThesis | |
| 2017 | Enhanced and disruptive radio-frequency receivers | Prata, André Isidoro | doctoralThesis | |
| 2008 | Executivo de tempo-real para processadores embutidos em FPGA | Silva, Nelson José Valente da | masterThesis | |
| 24-Jul-2018 | Exploration of all-digital transmitters in C-RAN scenarios | Pereira, Samuel Santos | masterThesis | |
| 11-Dec-2017 | Flexible LTE user equipment | Rosa, Tiago Miguel Simões | masterThesis | |
| Jul-2019 | FPGA implementation of a 5G-NR DU downlink Tx chain | Domingues, José Miguel Duarte | masterThesis | |
| Jul-2019 | FPGA implementation of a 5G-NR DU Rx Uplink chain | Coutinho, Fábio Daniel Lopes | masterThesis | |
| 27-Jul-2021 | FPGA-based 5G RU O-RAN Interface | Serôdio, Francisco Fischer de Almeida | masterThesis | |
| Dec-2019 | FPGA-based implementation of an ASK/FSK detector for railway signalling balises | Marques, Marcelo Rodrigo Almeida | masterThesis | |