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Title: Development of an ITS-G5 station, from the physical to the MAC layer
Author: Almeida, João Miguel Pereira de
Ferreira, Joaquim Castro
oliveira, Arnaldo
Issue Date: 23-Aug-2016
Publisher: CRC Press
Abstract: Wireless vehicular networks for cooperative Intelligent Transportation Systems (ITS) have raised widespread interest in the last few years, due to their potential applications and services. Cooperative applications with data sensing, processing and communication provide an unprecedented potential to improve vehicle and road safety, passenger’s comfort and ef ciency of traf c management and road monitoring. Safety, ef ciency and comfort applications envisaged for ITS exhibit tight latency and throughput requirements. For example safety critical services require guaranteed maximum latencies lower than 100 ms, while most infotainment applications require QoS support and data rates higher than 1 Mbit/s. In this context, BRISA, a motorway operator, challenged a team from Institute of Telecommunications (IT) to contribute with research in this area, to work speci cally on the then emergent IEEE 802.11p amendment. Back then, standards in this eld were (and still are) evolving and only a very limited number of Commercially Off The Shelf (COTS) components were available. Available COTS chip sets implemented an incomplete stack and, more importantly, have closed implementations (black box) of the standard, with a limited access to the API and programming model. This was an impairment to BRISA track record on open access to technology and independence from manufacturers. On the other hand, from the point of view of a research institution as IT, having the chance of developing from scratch, new technology and draft protocol implementations was considered quite relevant, as it potentiates the inclusion of innovative solutions beyond standards. Examples of such innovative solutions include support for real-time operation and fault-tolerance mechanisms. That was the rationale behind the development of a new ITS-G5 station, which will be described in a tutorial way in this chapter. The chapter presents the architecture of the PHY and MAC layers developed, including the RF front- end, the baseband PHY processing chains, the time sensitive lower MAC implementation and the software upper MAC. The most important design decisions, the validation methodologies and the interoperability tests are also discussed. The chapter ends with the presentation of the real-time extensions and primitives of the platform enabling the implementation of real-time protocols.
ISBN: 978-1-4987-2186-8
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Appears in Collections:ESTGA - Capítulo de livro

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