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Title: STDMA-based Scheduling Algorithm for Infrastructured Vehicular Networks
Author: Silva, Luís
Alam, Muhammad
Ferreira, Joaquim
Pedreiras, Paulo
Keywords: ITS
Issue Date: 2016
Publisher: Springer International Publishing
Abstract: A huge research effort has been devoted to the transportation sector in order to make it safer and more efficient, leading to the development of the so- called Intelligent Transportation Systems (ITS). In ITS there is a closed loop in- teraction between vehicles, drivers and the transportation infrastructure, supported by dedicated networks, usually referred to as vehicular networks. While some of the enabling technologies are entering their mature phase, the communication pro- tocols proposed so far aren’t able to fulfill the timeliness contraints of many ITS services, specially in road congestion scenarios. In order to tackle this issue, several medium access protocols (MAC), either relying on infrastructure or based on dir- ect ad-hoc communication, have been designed. A great number of these protocols employ Time Division Multiple Access (TDMA) techniques to manage communic- ations and attain some degree of determinism. Although the use of spatial reuse algorithms for TDMA protocols (STDMA) has been extensively studied as to in- crease the efficiency of standard ad-hoc and mesh networks, ITS networks exhibit a combination of features and requirements that are unique and aren’t addressed by these algorithms. This chapter1 discusses some of the most relevant challenges in providing deterministic real-time communications in ITS vehicular networks as well as the efforts that are being taken to tackle them. Focus on TDMA infrastructure-based protocols and on the challenges of employing spatial reuse methods in vehicu- lar environments is placed. A novel wireless vehicular communication architecture called V-FTT, which aims at providing deterministic communications in vehicular networks, is also presented. The chapter concludes with the design of a traffic scheduling analysis, a STDMA slot assignment algorithm and a Matlab simulator for V-FTT.
DOI: 10.1007/978-3-319-28183-4_4
ISBN: 978-3-319-28181-0
Appears in Collections:ESTGA - Capítulo de livro

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