Please use this identifier to cite or link to this item: http://hdl.handle.net/10773/8285
Title: Carrier phase lock loops tested with different input waves
Author: Reis, A.D.
Rocha, J.F.
Gameiro, A.S.
Carvalho, J.P.
Keywords: Synchronism in Digital Communications
Issue Date: 2008
Publisher: IEEE
Abstract: In this work, we will study the carrier phase lock loop (CPLL) when the input carrier changes its shape. The CPLL has four prototypes which are the analog, the hybrid, the combinational and the sequential. The input carrier can be a sinusoidal wave, a triangular wave or a rectangular wave. The objective is to study the four synchronizer types and to observe their jitter behaviors as function of the input carrier SNR (signal- noise ratio), when the carrier changes its shape between the three mentioned waves.
Peer review: yes
URI: http://hdl.handle.net/10773/8285
DOI: 10.1109/ICDT.2008.40
ISBN: 978-0-7695-3188-5
Publisher Version: http://www.scopus.com/inward/record.url?eid=2-s2.0-0141661276&partnerID=40&md5=b088f2d29b3e5670ba204aba5feb81fa
Appears in Collections:DETI - Comunicações

Files in This Item:
File Description SizeFormat 
Carrier_Phase_Paper_72.pdf145.88 kBAdobe PDFView/Open    Request a copy


FacebookTwitterDeliciousLinkedInDiggGoogle BookmarksMySpace
Formato BibTex MendeleyEndnote Degois 

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.