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Title: Carrier phase lock loops tested with different input waves
Author: Reis, A.D.
Rocha, J.F.
Gameiro, A.S.
Carvalho, J.P.
Keywords: Synchronism in Digital Communications
Issue Date: 2008
Publisher: IEEE
Abstract: In this work, we will study the carrier phase lock loop (CPLL) when the input carrier changes its shape. The CPLL has four prototypes which are the analog, the hybrid, the combinational and the sequential. The input carrier can be a sinusoidal wave, a triangular wave or a rectangular wave. The objective is to study the four synchronizer types and to observe their jitter behaviors as function of the input carrier SNR (signal- noise ratio), when the carrier changes its shape between the three mentioned waves.
Peer review: yes
DOI: 10.1109/ICDT.2008.40
ISBN: 978-0-7695-3188-5
Publisher Version:
Appears in Collections:DETI - Comunicações

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