Please use this identifier to cite or link to this item:
http://hdl.handle.net/10773/8173
Title: | Synchronizers based on carrier phase lock loop and on symbol phase lock loop |
Author: | Reis, A.D. Rocha, J.F. Gameiro, A.S. Carvalho, J.P. |
Keywords: | Synchronism in Digital Communications |
Issue Date: | 2008 |
Publisher: | IEEE |
Abstract: | The symbol synchronizer recoveries the clock and after, with it, samples and retimes the data. We present two synchronizer groups, the first based on filter with carrier phase lock loop (CPLL) and the second based on symbol phase lock loop (SPLL). Each group has four prototypes namely the analog, the hybrid, the combinational and the sequential. The objective is to study the various synchronizers output jitter UIRMS (unit interval root mean squared) as function of the input SNR (Signal to Noise Ratio). |
Peer review: | yes |
URI: | http://hdl.handle.net/10773/8173 |
DOI: | 10.1109/ICECS.2008.4674845 |
ISBN: | 978-1-4244-2181-7 |
Publisher Version: | http://www.scopus.com/inward/record.url?eid=2-s2.0-57849135193&partnerID=40&md5=fb4064601779f3f29d6c20218b0ac1ab |
Appears in Collections: | DETI - Comunicações |
Files in This Item:
File | Description | Size | Format | |
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Synchronizers_ppaer61.pdf | 134.54 kB | Adobe PDF |
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