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http://hdl.handle.net/10773/7058| Title: | 20 Gbit/s DR based timing recovery circuit |
| Author: | Monteiro, P. Matos, J.N. Gameiro, A. da Rocha, J.R.F. |
| Keywords: | Dielectric resonators Digital communication systems Optical receivers Passive filters Timing circuits |
| Issue Date: | 1994 |
| Publisher: | IET |
| Abstract: | The design and characterisation of a 20 Gbit/s clock recovery unit developed for the RACE 2011 project of the European Community is reported. This unit is based on an open loop structure using a dielectric resonator (DR) narrowband filter. The jitter results show that the approach provides a robust and low cost solution for the clock extraction problem at very high bit rates |
| Peer review: | yes |
| URI: | http://hdl.handle.net/10773/7058 |
| DOI: | 10.1049/el:19940518 |
| ISSN: | 0013-5194 |
| Appears in Collections: | DETI - Artigos |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| Gameiro_20GBits.pdf | 222.71 kB | Adobe PDF |  |
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