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 Synchronizers based on carrier phase lock loop and on symbol phase lock loop
Please use this identifier to cite or link to this item http://hdl.handle.net/10773/8173

title: Synchronizers based on carrier phase lock loop and on symbol phase lock loop
authors: Reis, A.D.
Rocha, J.F.
Gameiro, A.S.
Carvalho, J.P.
keywords: Synchronism in Digital Communications
issue date: 2008
publisher: IEEE
abstract: The symbol synchronizer recoveries the clock and after, with it, samples and retimes the data. We present two synchronizer groups, the first based on filter with carrier phase lock loop (CPLL) and the second based on symbol phase lock loop (SPLL). Each group has four prototypes namely the analog, the hybrid, the combinational and the sequential. The objective is to study the various synchronizers output jitter UIRMS (unit interval root mean squared) as function of the input SNR (Signal to Noise Ratio).
URI: http://hdl.handle.net/10773/8173
ISBN: 978-1-4244-2181-7
publisher version/DOI: http://dx.doi.org/10.1109/ICECS.2008.4674845
source: ICECS 2008: 15th IEEE International Conference on Electronics, Circuits and Systems
appears in collectionsDETI - Comunicações

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