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|title: ||20 Gbit/s DR based timing recovery circuit|
|authors: ||Monteiro, P.|
da Rocha, J.R.F.
|keywords: ||Dielectric resonators|
Digital communication systems
|issue date: ||1994|
|abstract: ||The design and characterisation of a 20 Gbit/s clock recovery unit developed for the RACE 2011 project of the European Community is reported. This unit is based on an open loop structure using a dielectric resonator (DR) narrowband filter. The jitter results show that the approach provides a robust and low cost solution for the clock extraction problem at very high bit rates|
|publisher version/DOI: ||dx.doi.org/10.1049/el:19940518|
|source: ||Electronics Letters|
|appears in collections||DETI - Artigos|
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